VRCPPH—Compute Reciprocals of Packed FP16 Values

Opcode/Instruction	Op/En	64/32 bit Mode Support	CPUID Feature Flag	Description
EVEX.128.66.MAP6.W0 4C /r VRCPPH xmm1{k1}{z}, xmm2/m128/m16bcst	A	V/V	AVX512-FP16 AVX512VL	Compute the approximate reciprocals of packed FP16 values in xmm2/m128/m16bcst and store the result in xmm1 subject to writemask k1.
EVEX.256.66.MAP6.W0 4C /r VRCPPH ymm1{k1}{z}, ymm2/m256/m16bcst	A	V/V	AVX512-FP16 AVX512VL	Compute the approximate reciprocals of packed FP16 values in ymm2/m256/m16bcst and store the result in ymm1 subject to writemask k1.
EVEX.512.66.MAP6.W0 4C /r VRCPPH zmm1{k1}{z}, zmm2/m512/m16bcst	A	V/V	AVX512-FP16	Compute the approximate reciprocals of packed FP16 values in zmm2/m512/m16bcst and store the result in zmm1 subject to writemask k1.

Opcode/Instruction

Op/En

64/32 bit Mode Support

CPUID Feature Flag

Description

EVEX.128.66.MAP6.W0 4C /r

VRCPPH xmm1{k1}{z}, xmm2/m128/m16bcst

V/V

AVX512-FP16 AVX512VL

Compute the approximate reciprocals of packed FP16 values in xmm2/m128/m16bcst and store the result in xmm1 subject to writemask k1.

EVEX.256.66.MAP6.W0 4C /r

VRCPPH ymm1{k1}{z}, ymm2/m256/m16bcst

V/V

AVX512-FP16 AVX512VL

Compute the approximate reciprocals of packed FP16 values in ymm2/m256/m16bcst and store the result in ymm1 subject to writemask k1.

EVEX.512.66.MAP6.W0 4C /r

VRCPPH zmm1{k1}{z}, zmm2/m512/m16bcst

V/V

AVX512-FP16

Compute the approximate reciprocals of packed FP16 values in zmm2/m512/m16bcst and store the result in zmm1 subject to writemask k1.

Instruction Operand Encoding

Op/En	Tuple	Operand 1	Operand 2	Operand 3	Operand 4
A	Full	ModRM:reg (w)	ModRM:r/m (r)	N/A	N/A

Description

This instruction performs a SIMD computation of the approximate reciprocals of 8/16/32 packed FP16 values in the source operand (the second operand) and stores the packed FP16 results in the destination operand. The maximum relative error for this approximation is less than 2⁻¹¹ + 2⁻¹⁴.

For special cases, see Table 5-18.

Table 5-18. VRCPPH/VRCPSH Special Cases

−2^-16≤ X ≤ -0

−INF

Input Value	Result Value	Comments
0 ≤ X ≤ 2^-16	INF	Very small denormal
X > +∞		Very small denormal
X < −∞	−0 +0

X = 2^-n X = −2^-n	−2^{n 2ⁿ}

Operation

VRCPPH dest{k1}, src

VL = 128, 256 or 512

KL := VL/16

FOR i := 0 to KL-1:

IF k1[i] or *no writemask*:

IF SRC is memory and (EVEX.b = 1):

tsrc := src.fp16[0]

ELSE:

tsrc := src.fp16[i]

DEST.fp16[i] := APPROXIMATE(1.0 / tsrc)

ELSE IF *zeroing*:

DEST.fp16[i] := 0

//else DEST.fp16[i] remains unchanged

DEST[MAXVL-1:VL] := 0

Intel C/C++ Compiler Intrinsic Equivalent

VRCPPH __m128h _mm_mask_rcp_ph (__m128h src, __mmask8 k, __m128h a);

VRCPPH __m128h _mm_maskz_rcp_ph (__mmask8 k, __m128h a);

VRCPPH __m128h _mm_rcp_ph (__m128h a);

VRCPPH __m256h _mm256_mask_rcp_ph (__m256h src, __mmask16 k, __m256h a);

VRCPPH __m256h _mm256_maskz_rcp_ph (__mmask16 k, __m256h a);

VRCPPH __m256h _mm256_rcp_ph (__m256h a);

VRCPPH __m512h _mm512_mask_rcp_ph (__m512h src, __mmask32 k, __m512h a);

VRCPPH __m512h _mm512_maskz_rcp_ph (__mmask32 k, __m512h a);

VRCPPH __m512h _mm512_rcp_ph (__m512h a);

SIMD Floating-Point Exceptions

None.

Other Exceptions

EVEX-encoded instruction, see Table 2-49, “Type E4 Class Exception Conditions.”